Job Information
Qualcomm Staff Verification Engineer, Compute Subsystems in Markham, Ontario
Company:
Qualcomm Canada ULC
Job Area:
Engineering Group, Engineering Group > ASICS Engineering
General Summary:
Are you a creative engineer looking for challenges?
Want to develop technologies that improve people’s everyday life?
Qualcomm AI HW team is looking for a strong ASIC design verification engineer.
Join our effort in developing world class ML HW solutions and push the boundaries on features and performance.
Minimum Qualifications:
• Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
As a member of the team, your responsibilities include:
Work closely with design, architects, and verification leads to develop the multimedia and compute subsystem integration verification strategy and test plan
Create verification environment using UVM/System Verilog
Resolve architecture, design, or verification problems by applying sound ASIC engineering practices with minimal supervision
Write tests and regressions to identify any bugs in own work and helps more junior team members do the same
Develop C reference model
Interpret the results of performance checks and identify issues
Communicate directly with lead on any significant deviations from the Plan of Record for assigned block in a timely manner
Perform RTL code coverage, assertion coverage, functional coverage, and gate level simulations
Employ power aware verification technique to verify low power design features
Identify opportunity for productivity improvements. Drive and adopt new verification methodologies and flows for efficiency improvements
Required Competencies
Thorough understanding of Digital design concepts
Strong UVM, System Verilog skills
Understanding of Bus protocols like AHB/AXI
Perl, python scripting experience
Quick understanding of Specs and Standards and developing relevant and thorough test plans
Experienced in developing monitors, scoreboards, sequencers and sequences and various aspects of the UVM testbenches
Candidates should be comfortable checking builds, navigating test benches, analyzing coverage, and adding or enabling extra debug
Strong communication skills and works well in a team environment
Minimum Qualifications
- 5+ years ASIC design, verification, or related work experience.
Applicants : If you need an accommodation, during the application/hiring process, you may request an accommodation by sending email to accommodationsupport
Although this role has some expected minor physical activity, this should not deter otherwise qualified applicants from applying. If you are an individual with a physical or mental disability and need an accommodation during the application/hiring process, please call Qualcomm’s toll-free number found here (https://qualcomm.service-now.com/hrpublic?id=hr_public_article_view&sysparm_article=KB0039028) for assistance. Qualcomm will provide reasonable accommodations, upon request, to support individuals with disabilities as part of our ongoing efforts to create an accessible workplace.
Qualcomm is an equal opportunity employer and supports workforce diversity.
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
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If you would like more information about this role, please contact Qualcomm Careers (http://www.qualcomm.com/contact/corporate) .
EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification
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